Graphics Logic Design Engineer - Cache/MMU


Cupertino, CA 95015

Posted 1 week ago

Job Description

Graphics Logic Design Engineer - Cache/MMU

Santa Clara Valley (Cupertino),California,United States


+ 5+ years of logic design/performance analysis experience

+ Strong background in memory hierarchy design including cache, MMU and on chip interconnect network

+ Strong background in computer architecture

+ Experience in characterizing performance, executing comparison studies, and debugging performance issues

+ Low power design techniques

+ Experience with Verilog, HDL, C, C++ Experience with GPU design is a plus

+ Experience with scripting languages

+ Ability to work well in a team in order to be productive under aggressive project schedules


Debug system-level functional and performance issues. Validate the functionality and quantify the performance benefit of the features and algorithms implemented in HW or SW. Conduct studies and contribute solutions to functional performance challenges related to GPU memory system. Participate in micro-architecture specification and RTL logic design in the GPU team. Work with verification team for functional simulation and debug. You will go beyond the industry norm and demonstrate creativity in problem solving, ability to think dynamically and outside of standard convention, and adapt quickly to new technical areas. We promote innovation and new technology The people who work here have reinvented and defined entire industries with the Mac, iPhone, iPad, Apple TV, Apple Watch, AirPods, HomePod and a multitude of groundbreaking Accessories. We have done the same with services, including iTunes, the App Store, Apple Music, and Apple Pay. The same passion for innovation that goes into our products also applies to our practices — strengthening our commitment to leave the world better than we found it. You should join us to help deliver the next amazing Apple product.

**Education & Experience**

MSEE preferred; or BSEE plus equivalent level of experience.

**Additional Requirements**

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