Signal Integrity Engineer â€“ Memory Interface
Santa Clara Valley (Cupertino),California,United States
+ We are looking for someone who is familiar with signal and power integrity issues of memory interfaces
+ Prior experience working with actual product package/board design and analysis, PI/SI methodology development, and lab correlation/validation of the simulation results
+ Excellent academic background; 5+ years of working experience beyond graduate school studies
+ Familiar with lab equipment, such as: VNA, TDR, real-time scope, spectrum analyzer, etc
+ Strong fundamentals in 3D/2D EM simulation tools and transmission line theory
+ Good communication skills
â€¢You will work on electrical and physical design of memory systems â€¢Work on electrical extraction and validation of package and MLB â€¢Work with circuit and controller team to optimize memory system design â€¢Work on SI and PI modeling, simulation, and characterization memory interface â€¢Develop and execute test plans to validate signal and power integrity â€¢Work with product engineering and system engineering to debug and to improve product yield
**Education & Experience**
â€¢MSEE or PhD in a technical discipline
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