Silicon Design Integration Engineer
+ You will have experience in the following areas:
+ - 5+ years of RTL Logic Design experience of multi-million gate ASICs
+ - Prior experience or knowledge within one or more Southbridge technologies (PCI Express, USB, NAND Flash, Audio, Security, Encryption/Decryption, SATA, SDIO, xSPI, UART, and/or Ethernet) required
+ - Familiarity for all aspects of the chip development process with proficiency in using front end design entry and analysis tools
+ - Writing specifications and converting them to design
+ - Timing closure on logic designs
+ - Bring up and lab debug of FPGAs and silicon
+ - Experience with front end QA methodologies like Lint checking, LEQ, Synthesis, Static Timing Analysis (including analysis of setup and hold with clock tree delay, clock skew, clock gating)
+ - Designing high performance, low power ASICs/SOCs from scratch, a plus
+ - Understanding of various DMA architectures, a plus.
As a South-bridge IO, PCI Express, USB, or Security SoC Integration engineer joining our design integration team, the candidate will have responsibilities spanning all aspects of SoC design and chip bring up: - You will partner with the SoC Design, SoC Design Verification, System Verification, Firmware, Emulation, STA, and Physical Design teams to deliver a working South-bridge subsystem within the SoC. - Developing micro-architecture and design specifications. - Implementing and verifying complex logic designs. - Hands-on verification and validation on emulation platforms running with the SW driver. - Working with designers on STA, physical, power and logical issues.
**Education & Experience**
BSEE required / MSEE is desired
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