Silicon Validation PVT Engineer

Apple

Portland, OR 97240

Posted 1 month ago

Job Description

Silicon Validation PVT Engineer


Portland,Oregon,United States


Hardware


+ Exposures to post-Silicon validation, silicon bringup, testing/debug/root cause of circuit marginalities, product engineering, foundry manufacturing, etc.


+ Understanding test execution through both functional mode and DFX hooks


+ You are comfortable working primarily in a lab environment


+ You have strong scripting skills in one of the major languages: eg. Perl, python, Tcl, bash


+ You have good experimental technique, techniques of problem localization and root-cause


+ You have system level understanding of CPU/SoC architecture, Memories (DDR, NAND), Systems


+ Good data analysis skills and attention to details


+ Nice-to-haves (in at least one and preferably several areas):


+ Chip design background in circuit/physical design (timing closure, power, etc.) or DV (correlating SW signatures to block level tests).


+ Post silicon physical debug background in speed-path/Vmin, memory arrays, clocking or yield improvements.


+ Post silicon logic debug background in exercising various DFX features, analyzing scandump/memdump, suggesting tests in both system level or to DV


+ Deep understanding of boot process, boot-loaders, embedded software, micro-kernel and able to tweak system tests.


+ Product engineering background and familiarity with ATE coverage, margin, binning, scan pattern generation, etc.


+ Good IP knowledge in some PHY blocks (eg. DDR, PCIe, USB, etc)


**Description**


In this role, you will own and execute on the post silicon validation and characterization test plans across Process, Voltage and Temperature (PVT), debug various issues encountered along the way (setup artifacts, test code, logic bugs, physical design debugs, etc. TASKS WILL INCLUDE: - Understanding new chip features and define coverage applicable to our test environment - Executing a validation test on large volume and analyze results (pass/failure/artifacts/surprises/etc.) - Be the first line of defense when failure occurs to isolate (setup, code, artifacts, silicon issues, logic/physical, identify blocks, etc.). - Once isolated, working with domain experts to define debugs and come up with a root cause. - Assisting in driving a fix. Maintain and create automation scripts/flows for self consumption as well as others. - Able to summarize debugs/findings and think along the line of improvements in both DFX features and test coverage.


**Education & Experience**


BS/MS in Computer Engineering or Electrical Engineering or equivalent is required.


**Additional Requirements**


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