SoC Power Spec Engineer
Santa Clara Valley (Cupertino),California,United States
+ We are looking for applicants with experience in low power architecture, ASIC design implementation for low power, ASIC physical design methodology.
+ Experience with low power logic implementation.
+ Experience with low power architecture techniques.
+ Familiarity with ASIC design flows.
+ Familiarity with physical design tools for power optimization.
+ Strong communication skills are a pre-requisite since you will collaborate with a lot of different groups.
Imagine yourself at the center of our SOC design effort, collaborating with all disciplines, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of talented engineers. The main responsibility of this role is to own SOC power specifications, and drive multi-functional teams to improve power efficiency. - Develop new techniques for power efficiency in our products. - Guide design implementation to achieve the power targets. - Create or improve new methodologies to improve power. - Maintain power roll-up and power spec at the chip level - Understand interactions of the product at the architecture and system level. - Drive the multi-functional power estimation and optimization with architecture, design and software teams.
**Education & Experience**
BSEE/MSEE or Computer Science required.
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