Software Engineer Lead - Design Verification Engineer


San Diego, CA 92108

Posted 1 month ago

Job Description

Capgemini is an Equal Opportunity Employer encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law.

This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodations do not pose an undue hardship.

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**About Capgemini**

With 270,000 women and men in nearly 50 countries, Capgemini is a responsible and multicultural global leader. Its purpose: unleashing human energy through technology for an inclusive and sustainable future. As a strategic partner to companies, Capgemini has harnessed the power of technology to enable business transformation for more than 50 years. The Group addresses the entire breadth of business needs, from strategy and design to managing operations. To do this, it relies on deep industry expertise and its command of fast evolving fields such as cloud, data, artificial intelligence, connectivity, software, digital engineering and platforms. In 2020, Capgemini reported global revenues of €16 billion.

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Design Verification Engineer

In this role you will:

·Implement a state-of-the-art verification environment to facilitate testing of the RTL against

reference Matlab/C models

·Develop detailed test plans and write tests, run regressions, collect coverage matrices and

report progress to the program.

·Work with the design and Communication systems team and participate in System level

verification using test benches constructed using UVM, System C and DPI-C.

·Develop a highly automated environment to run regressions that can be used to make builds

and maintain the sanity of the database.

Basic Qualifications:

.Bachelor's degree in Electrical / Communications Engineering or Computer Science

·5 to 7 years of experience in verification preferably in communication systems

·Proven track record where products have gone to volume production, preferably 1st pass


·Strong written and verbal skills

·Strong problem solving and debugging skills

·Strong proficiency in SystemVerilog, UVM, C, System C and good scripting skills.

Preferred Qualifications:

·Master's or Ph.D degree in Electrical / Communications Engineering.

·Experience with Verification techniques using Matlab/C/System reference models

·Able to adopt the use of new techniques and methodologies

·Experience in developing coverage-driven verification test plans.

·Familiarity with constrained random and assertion based verification.

Candidates should be flexible / willing to work across this delivery landscape which includes and not limited to Agile Applications Development, Support and Deployment.

**Job:** _Programmer/Analyst_

**Organization:** _ERD PPL US_

**Title:** _Software Engineer Lead - Design Verification Engineer_

**Location:** _CA-San Diego_

**Requisition ID:** _065496_

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